From 2007: Slideshow of pictures from the lectures in the first several weeks. (Save them with right-click to see them in full resolution.) Click here for a zip file of the rest of the board pictures.

Note that the below breakout of the topics over the week may not be identical to what we have been doing this year in terms of their order. However, in terms of what has been covered so far, they are correct.

Week 1: Getting to know each other. Chip making process (ignore).

Week 2: CMOS transistor level design (ignore). Standards and organizations that make them. Digital design review (ignore): De Morgan's Law, truth tables, minterms, designing with AND/OR, converting to NAND2 gates.

Week 3: State machines. Memory hierarchy (ignore). Throughput versus latency. Synchronous versus asynchronous. Pattern matcher design. Critical path computation (ignore). Valid/ready interfaces.

Week 5 (Mar 5 - 9): More RS-232. Clock2Q delay, setup time, clock skew. Parity. Half/full duplex.

Week 6 (Mar 12 - 16): FIFO. PS/2 port: Mouse, Keyboard. PC Video.

Week 7 (Mar 19 - 23): Only "Phone plug standards" was covered from the lecture notes. Review session. Midterm 1.

Week 8.

Week 9.

Week 10.

Week 11.

Week 12.