This course intends to teach digital logic design for
implementation on FPGAs as well as some basics of low-level digital
electronics. It is a hands-on course with lab work and projects
realized on Digilent FPGA boards using Xilinx ISE software. We use
Verilog language. The course emphasizes timing and area issues of the
respective design problems as well as functionality issues. This
course has been taught several times under different names and with
slightly different content.
Prerequisites: Intermediate programming.
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Instructor
Prof. H. Fatih Ugurdag
email: fatih.ugurdagATozyegin.edu.tr
PhD, 1995, Case Western Reserve University
EE562 Grading
|
Labs: Project: HWs: Midterm: Final: Attendance: Bonuses: |
30% 25% 5% 15% 18% 7% Extra -- added on top of the 100 pts above |
EE362 Grading
|
Labs: HWs: Midterm: Final: Attendance: Bonuses: |
50% 8% 15% 20% 7% Extra -- added on top of the 100 pts above |